Technical Field
Embodiments described herein relate to microelectromechanical systems (MEMS) and methods. More particularly, some embodiments disclosed herein relate to a systems and methods for inhibiting structural damage and/or short circuits in MEMS resulting from inadvertent and/or excessive contact between moveable parts during use.
Description of the Related Art
MEMS devices include micromachines integrated with electronic microcircuits on substrates. MEMS may be used as, for example, microsensors or microactuators. MEMS devices may operate based upon, for example, electromagnetic, electrostrictive, thermoelectric, piezoelectric, or piezoresistive effects. MEMS devices have been formed on substrates (e.g., insulators) using micro-electronic techniques such as, for example, photolithography, vapor deposition, and etching. Recently, MEMS have been fabricated using the methods (e.g., the deposition of layers of material and the selective removal of the layers of material) that are used to fabricate conventional analog and digital complementary metal oxide semiconductor (CMOS) circuits.
MEMS are typically made up of components between 1 to 100 micrometers in thickness, and MEMS devices typically range in size from 20 micrometers to a millimeter. They usually consist of a central unit that processes data (the microprocessor) and several components that interact with the surroundings such as microsensors. At these size scales, classical physics are not always useful when trying to predict how the MEMS will function. Because of the large surface area to volume ratio of MEMS, surface effects such as electrostatics and wetting dominate over, for example, volume effects such as inertia or thermal mass.
For example, FIG. 1 depicts an embodiment of a representation of a radio frequency MEMS wafer level package 100. RE MEMS components are fragile and require wafer level packaging or single chip packaging which allow for hermetic cavity sealing. A cavity 110 is required to allow movement, whereas hermeticity is required to prevent cancellation of the spring force by the Van der Waals force exerted by water droplets and other contaminants on the beam 120. RF MEMS switches, switched capacitors and varactors can be packaged using wafer level packaging. Large monolithic RF MEMS filters, phase shifters, and tunable matching networks require single chip packaging. FIG. 1 depicts an embodiment of a representation of a radio frequency MEMS wafer level package 100 in which the systems described herein may be used.
Wafer-level packaging is implemented before wafer dicing, as shown in, and is based on anodic, metal diffusion, metal eutectic, glass frit, polymer adhesive, and silicon fusion wafer bonding. The selection of a wafer-level packaging technique is based on balancing the thermal expansion coefficients of the material layers of the RE MEMS component and those of the substrates to minimize the wafer bow and the residual stress, as well as on alignment and hermeticity requirements. Figures of merit for wafer-level packaging techniques are chip size, hermeticity, processing temperature, (in)tolerance to alignment errors, no distortion or damage of the MEMS structures, and surface roughness.
A typical MEMS design may use the CMOS Controller & Readout Chip as a Cap for Hermetic Sealing of the MEMS structure. In this case a portion of a top dielectric layer of a complementary metal-oxide semiconductor (CMOS) can be used as a bump stop. The bump stop is supposed to inhibit damage to the semiconductor as well as MEMS structures during use of the MEMS. Cracks may form below the bump stops due to impacts with the stops. These structural failures within the semiconductor may lead to, for example, electrical failures which ultimately lead to failure of the MEMS itself. Cracks or other forms of damage may also be formed in the MEMS structure where it impacts the stopper. This can lead to particle shedding which can impede the functioning of MEMS structures as well as could lead to shorts in CMOS circuitry